Lenovo Thinkpad T61
Video chipset
Video Chipset: Intel GMA X3100
Video Chipset Codename:
Video Memory: 384 MBytes
Video Card
Video Card: Intel GM965/GML960 Chipset - Integrated Graphics 0 [C0] [Lenovo]
Video Bus: PCI
Video RAMDAC: Internal
Video BIOS Version: 1436 PC 14.21 02/05/2007 17:32:38
Performance
Hardware ID: PCI\VEN_8086&DEV_2A02&SUBSYS_20B517AA&REV_0C
PCI Location (Bus:Dev:Fnc): 0:02:0
Driver Information
Driver Manufacturer: Intel Corporation
Driver Description: Mobile Intel(R) 965 Express Chipset Family
Driver Provider: Intel Corporation
Driver Version: 8.15.10.1930
Driver Date: 23-Sep-2009
DeviceInstanceId PCI\VEN_8086&DEV_2A02&SUBSYS_20B517AA&REV_0C\3&33FD14CA&0&10
Location Paths PCIROOT(0)#PCI(0200)
General Information
Processor Name: Intel Core 2 Duo T7500
Original Processor Frequency: 2200.0 MHz
CPU ID: 000006FB
CPU Brand Name: Intel(R) Core(TM)2 Duo CPU T7500 @ 2.20GHz
CPU Vendor: GenuineIntel
CPU Stepping: G2
CPU Code Name: Merom+ SV
CPU Technology: 65 nm
CPU S-Spec: SLAF8, SLADM
CPU Thermal Design Power (TDP): 35 W
CPU Max. Junction Temperature (Tj,max): 100 °C
CPU Type: Production Unit
CPU Platform: Socket P (mPGA478/mBGA479)
Microcode Update Revision: B6
Number of CPU Cores: 2
Number of Logical CPUs: 2
Operating Points
CPU SLFM (Dynamic FSB): 800.0 MHz = 8 x 100.0 MHz @ 0.8500 V
CPU LFM (Minimum): 1200.0 MHz = 6 x 200.0 MHz @ 0.9375 V
CPU HFM (Base): 2200.0 MHz = 11 x 200.0 MHz @ 1.2500 V [Locked]
CPU IDA: 2400.0 MHz = 12 x 200.0 MHz @ 1.2875 V
CPU Current: 2194.2 MHz = 11 x 199.5 MHz @ 1.2500 V
CPU Bus Type: FSB (QDR)
Cache and TLB
L1 Cache: Instruction: 2 x 32 KBytes, Data: 2 x 32 KBytes
L2 Cache: Integrated: 4 MBytes
Instruction TLB: 4 KB Pages, 4-way set associative, 128 entries
Data TLB: 4 MB Pages, 4-way set associative, 32 entries
Standard Feature Flags
FPU on Chip Present
Enhanced Virtual-86 Mode Present
I/O Breakpoints Present
Page Size Extensions Present
Time Stamp Counter Present
Pentium-style Model Specific Registers Present
Physical Address Extension Present
Machine Check Exception Present
CMPXCHG8B Instruction Present
APIC On Chip / PGE (AMD) Present
Fast System Call Present
Memory Type Range Registers Present
Page Global Feature Present
Machine Check Architecture Present
CMOV Instruction Present
Page Attribute Table Present
36-bit Page Size Extensions Present
Processor Number Not Present
CLFLUSH Instruction Present
Debug Trace and EMON Store Present
Internal ACPI Support Present
MMX Technology Present
Fast FP Save/Restore (IA MMX-2) Present
Streaming SIMD Extensions Present
Streaming SIMD Extensions 2 Present
Self-Snoop Present
Multi-Threading Capable Present
Automatic Clock Control Present
IA-64 Processor Not Present
Signal Break on FERR Present
Virtual Machine Extensions (VMX) Present
Safer Mode Extensions (Intel TXT) Not Present
Streaming SIMD Extensions 3 Present
Supplemental Streaming SIMD Extensions 3 Present
Streaming SIMD Extensions 4.1 Not Present
Streaming SIMD Extensions 4.2 Not Present
AVX Support Not Present
Fused Multiply Add (FMA) Not Present
Carryless Multiplication (PCLMULQDQ)/GFMUL Not Present
CMPXCHG16B Support Present
MOVBE Instruction Not Present
POPCNT Instruction Not Present
XSAVE/XRSTOR/XSETBV/XGETBV Instructions Not Present
XGETBV/XSETBV OS Enabled Not Present
Float16 Instructions Not Present
AES Cryptography Support Not Present
Random Number Read Instruction (RDRAND) Not Present
Extended xAPIC Not Present
MONITOR/MWAIT Support Present
Thermal Monitor 2 Present
Enhanced SpeedStep Technology Present
L1 Context ID Not Present
Send Task Priority Messages Disabling Present
Processor Context ID Not Present
Direct Cache Access Not Present
TSC-deadline Timer Not Present
Performance/Debug Capability MSR Present
IA32 Debug Interface Support Not Present
64-Bit Debug Store Present
CPL Qualified Debug Store Present
Extended Feature Flags
64-bit Extensions Present
RDTSCP and TSC_AUX Support Not Present
1 GB large page support Not Present
No Execute Present
SYSCALL/SYSRET Support Not Present
Bit Manipulation Instructions Set 1 Not Present
Bit Manipulation Instructions Set 2 Not Present
Advanced Vector Extensions 2 (AVX2) Not Present
Advanced Vector Extensions 512 (AVX-512) Not Present
AVX-512 Prefetch Instructions Not Present
AVX-512 Exponential and Reciprocal Instructions Not Present
AVX-512 Conflict Detection Instructions Not Present
AVX-512 Doubleword and Quadword Instructions Not Present
AVX-512 Byte and Word Instructions Not Present
AVX-512 Vector Length Extensions Not Present
AVX-512 52-bit Integer FMA Instructions Not Present
Secure Hash Algorithm (SHA) Extensions Not Present
Software Guard Extensions (SGX) Support Not Present
Supervisor Mode Execution Protection (SMEP) Not Present
Supervisor Mode Access Prevention (SMAP) Not Present
Hardware Lock Elision (HLE) Not Present
Restricted Transactional Memory (RTM) Not Present
Memory Protection Extensions (MPX) Not Present
Read/Write FS/GS Base Instructions Not Present
Enhanced Performance String Instruction Not Present
INVPCID Instruction Not Present
RDSEED Instruction Not Present
Multi-precision Add Carry Instructions (ADX) Not Present
PCOMMIT Instructions Not Present
CLFLUSHOPT Instructions Not Present
CLWB Instructions Not Present
TSC_THREAD_OFFSET Not Present
Platform Quality of Service Monitoring (PQM) Not Present
Platform Quality of Service Enforcement (PQE) Not Present
FPU Data Pointer updated only on x87 Exceptions Not Present
Deprecated FPU CS and FPU DS Not Present
Intel Processor Trace Not Present
PREFETCHWT1 Instruction Not Present
AVX-512 Vector Bit Manipulation Instructions Not Present
AVX-512 Vector Bit Manipulation Instructions 2 Not Present
AVX-512 Galois Fields New Instructions Not Present
AVX-512 Vector AES Not Present
AVX-512 Vector Neural Network Instructions Word Not Present
AVX-512 Bit Algorithms Not Present
AVX-512 Carry-Less Multiplication Quadword (VPCLMULQDQ) Not Present
AVX-512 Vector POPCNT (VPOPCNTD/VPOPCNTQ) Not Present
User-Mode Instruction Prevention Not Present
Protection Keys for User-mode Pages Not Present
OS Enabled Protection Keys Not Present
Total Memory Encryption Not Present
Read Processor ID Not Present
SGX Launch Configuration Not Present
AVX-512 4 x Vector Neural Network Instructions Word Variable Precision Not Present
AVX-512 4 x Fused Multiply Accumulation Packed Single Precision Not Present
Enhanced Features
Thermal Monitor 1: Supported, Enabled
Thermal Monitor 2: Supported, Enabled
Enhanced Intel SpeedStep (GV3): Supported, Enabled
Bi-directional PROCHOT#: Enabled
Extended Auto-HALT State C1E: N/A
MLC Streamer Prefetcher Not Supported
MLC Spatial Prefetcher Not Supported
DCU Streamer Prefetcher Not Supported
DCU IP Prefetcher Not Supported
Intel Dynamic Acceleration (IDA) Technology: Supported, Enabled
Intel Dynamic FSB Switching: Supported, Enabled
Intel Turbo Boost Technology: Not Supported
Programmable Ratio Limits: Not Supported
Programmable TDC/TDP Limits: Not Supported
Hardware Duty Cycling: Not Supported
Memory Ranges
Maximum Physical Address Size: 36-bit (64 GBytes)
Maximum Virtual Address Size: 48-bit (256 TBytes)
MTRRs
Range 0-100000000 (0MB-4096MB) Type: Write Back (WB)
Range 100000000-140000000 (4096MB-5120MB) Type: Write Back (WB)
Range BF700000-BF800000 (3063MB-3064MB) Type: Uncacheable (UC)
Range BF800000-C0000000 (3064MB-3072MB) Type: Uncacheable (UC)
Range C0000000-100000000 (3072MB-4096MB) Type: Uncacheable (UC)
Range 13C000000-140000000 (5056MB-5120MB) Type: Uncacheable (UC)
Waldschrat_70
Alpha13
